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SystemVerilog for Verification, Spear, 9781461407140
US $46.08
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Located in: Carrollton, Texas, United States
Delivery:
Estimated between Sat, Jun 29 and Fri, Jul 5 to 43230
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eBay item number:335373100986
Item specifics
- Condition
- Book Title
- SystemVerilog for Verification
- ISBN
- 9781461407140
- Subject Area
- Computers, Technology & Engineering
- Publication Name
- Systemverilog for Verification : a Guide to Learning the Testbench Language Features
- Publisher
- Springer
- Item Length
- 9.3 in
- Subject
- Cad-Cam, Hardware / General, Electronics / Circuits / Integrated, Electronics / Circuits / General, Programming / Object Oriented, Logic Design
- Publication Year
- 2012
- Type
- Textbook
- Format
- Hardcover
- Language
- English
- Item Height
- 0.4 in
- Item Weight
- 32.5 Oz
- Item Width
- 6.1 in
- Number of Pages
- Xliv, 464 Pages
About this product
Product Information
Verification Guidelines.- Data Types.- Procedural Statements and Routines.- Connecting the Testbench and Design.- Basic OOP.- Randomization.- Threads and Interprocess Communication.- Advanced OOP and Testbench Guidelines.- Functional Coverage.- Advanced Interfaces.- A Complete SystemVerilog Testbench.- Interfacing with C/C++.
Product Identifiers
Publisher
Springer
ISBN-10
1461407141
ISBN-13
9781461407140
eBay Product ID (ePID)
110902524
Product Key Features
Number of Pages
Xliv, 464 Pages
Language
English
Publication Name
Systemverilog for Verification : a Guide to Learning the Testbench Language Features
Publication Year
2012
Subject
Cad-Cam, Hardware / General, Electronics / Circuits / Integrated, Electronics / Circuits / General, Programming / Object Oriented, Logic Design
Type
Textbook
Subject Area
Computers, Technology & Engineering
Format
Hardcover
Dimensions
Item Height
0.4 in
Item Weight
32.5 Oz
Item Length
9.3 in
Item Width
6.1 in
Additional Product Features
Edition Number
3
Intended Audience
Scholarly & Professional
Dewey Edition
22
Number of Volumes
1 Vol.
Illustrated
Yes
Dewey Decimal
621.39/2
Lc Classification Number
Tk7867-7867.5
Table of Content
Verification Guidelines.- Data Types.- Procedural Statements and Routines.- Connecting the Testbench and Design.- Basic OOP.- Randomization.- Threads and Interprocess Communication.- Advanced OOP and Testbench Guidelines.- Functional Coverage.- Advanced Interfaces.- A Complete SystemVerilog Testbench.- Interfacing with C/C++.
Copyright Date
2012
Item description from the seller
Seller assumes all responsibility for this listing.
eBay item number:335373100986
Shipping and handling
Item location:
Carrollton, Texas, United States
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United States
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| Shipping and handling | To | Service | Delivery*See Delivery notes |
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| Free shipping | United States | Economy Shipping | Estimated between Sat, Jun 29 and Fri, Jul 5 to 43230 |
| US $4.00 | United States | Standard Shipping | Estimated between Thu, Jun 27 and Mon, Jul 1 to 43230 |
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