Digital Systems Design Using Verilog by Charles Roth: Used

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Item specifics

Condition
Good: A book that has been read but is in good condition. Very minimal damage to the cover including ...
Book Title
Digital Systems Design Using Verilog
Publication Date
2015-01-01
ISBN
1285051076
Subject Area
Computers, Technology & Engineering
Publication Name
Digital Systems Design Using Verilog
Publisher
Cengage Learning
Item Length
9.4 in
Subject
Hardware / General, Electrical, Logic Design, Software Development & Engineering / Systems Analysis & Design
Publication Year
2015
Series
Mindtap Course List Ser.
Type
Textbook
Format
Hardcover
Language
English
Item Height
1 in
Author
Charles Roth, Lizy John, Byeong Kil Lee
Features
New Edition
Item Weight
44.9 Oz
Item Width
8.2 in
Number of Pages
608 Pages
Category

About this product

Product Identifiers

Publisher
Cengage Learning
ISBN-10
1285051076
ISBN-13
9781285051079
eBay Product ID (ePID)
202437422

Product Key Features

Number of Pages
608 Pages
Publication Name
Digital Systems Design Using Verilog
Language
English
Subject
Hardware / General, Electrical, Logic Design, Software Development & Engineering / Systems Analysis & Design
Publication Year
2015
Features
New Edition
Type
Textbook
Author
Charles Roth, Lizy John, Byeong Kil Lee
Subject Area
Computers, Technology & Engineering
Series
Mindtap Course List Ser.
Format
Hardcover

Dimensions

Item Height
1 in
Item Weight
44.9 Oz
Item Length
9.4 in
Item Width
8.2 in

Additional Product Features

Intended Audience
College Audience
LCCN
2014-947845
Illustrated
Yes
Edition Description
New Edition
Table Of Content
1. REVIEW OF LOGIC DESIGN FUNDAMENTALS. Combinational Logic. Boolean Algebra and Algebraic Simplification. Karnaugh Maps. Designing with NAND and NOR Gates. Hazards in Combinational Circuits. Flip-Flops and Latches. Mealy Sequential Circuit Design. Design of a Moore Sequential Circuit. Equivalent States and Reduction of State Tables. Sequential Circuit Timing. Tristate Logic and Busses. 2. INTRODUCTION TO VERILOG. Computer-Aided Design. Hardware Description Languages. Verilog Description of Combinational Circuits. Verilog Modules. Verilog Assignments. Procedural Assignments. Modeling Flip-Flops Using Always Block. Always Blocks Using Event Control Statements. Delays in Verilog. Compilation, Simulation, and Synthesis of Verilog Code. Verilog Data Types and Operators. Simple Synthesis Examples. Verilog Models for Multiplexers. Modeling Registers and Counters Using Verilog Always Statements. Behavioral and Structural Verilog. Constants. Arrays. Loops in Verilog. Testing Verilog Model. A Few Things to Remember. 3. INTRODUCTION TO PROGRAMMABLE LOGIC DEVICES. Brief Overview of Programmable Logic Devices. Simple Programmable Logic Devices (SPLDs). Complex Programmable Logic Devices (CPLDs). Field-Programmable Gate Arrays (FPGAs). 4. DESIGN EXAMPLES. BCD to 7-Segment Display Decoder. A BCD Adder. 32-Bit Adders. Traffic Light Controller. State Graphs for Control Circuits. Scoreboard and Controller. Synchronization and Debouncing. A Shift-and-Add Multiplier. Array Multiplier. A Signed Integer/Fraction Multiplier. Keypad Scanner. Binary Dividers. 5. SM CHARTS AND MIRCOPROGRAMMING. State Machine Charts. Derivation of SM Charts. Realization of SM Charts. Implementation of the Dice Game. Microprogramming. Linked State Machines. 6. DESIGNING WITH FIELD PROGRAMMABLE GATE ARRAYS. Implementing Functions in FPGAs. Implementing Functions Using Shannon's Decomposition. Carry Chains in FPGAs. Cascade Chains in FPGAs. Examples of Logic Blocks in Commercial FPGAs. Dedicated Memory in FPGAs. Dedicated Multipliers in FPGAs. Cost of Programmability. FPGAs and One-Hot State Assignment. FPGA Capacity: Maximum Gates versus Usable Gates. Design Translation (Synthesis). Mapping, Placement, and Routing. 7. FLOATING-POINT ARITHMETIC. Representation of Floating-Point Numbers. Floating-Point Multiplication. Floating-Point Addition. Other Floating-Point Operations. 8. ADDITIONAL TOPICS IN VERILOG. Verilog Functions. Verilog Tasks. Multi-Valued Logic and Signal Resolution. Built-in Primitives. User Defined Primitives. SRAM Model. Model for SRAM Read/Write System. Rise and Fall Delays of Gates. Named Association. Generate Statements. System Functions. Compiler Directives. File I/O Functions. Timing Check. 9. DESIGN OF A RISC MICROPROCESSOR. The RISC Philosophy. The MIPS ISA. MIPS Instruction Encoding. Implementation of a MIPS Subset. VHDL Model. 10. HARDWARE TESTING AND DESIGN FOR TESTABILITY. Testing Combinational Logic. Testing Sequential Logic. Scan Testing. Boundary Scan. Built-In Self-Test.
Synopsis
Master the process of designing and testing new hardware configurations with DIGITAL SYSTEMS DESIGN USING VERILOG. This practical book integrates coverage of logic design principles, Verilog as a hardware design language, and FPGA implementation. The authors present Verilog constructs side-by-side with hardware, encouraging you to think in terms of desired hardware while writing synthesizable Verilog. Following a review of the basic concepts of logic design, the authors introduce the basics of Verilog using simple combinational circuit examples, followed by models for simple sequential circuits. Subsequent chapters ask you to tackle more and more complex designs.
LC Classification Number
TK7885.7.R68 2016

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