One of a Kind
UNIVAC 1050 CPU SIGNAL SEQUENCE DIAGRAMS
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Presented for Buy-It-Now is a MH 1051, SIGNAL SEQUENCE DIAGRAM handbook for the Univac 1050 Processor. The Univac 1050 was a mid range mainframe computer. It used discrete transistors to make up the logics. Core memory was it's only internal memory. This CPU was a 6 bit octal satellite computer for the Univac III, from the mid 1960's. This manual includes the Flow Charts that detail how the instruction being executed by the processor gets accomplished. Also in the manual are sections on the Buffered Printer, and Card Readers and Punches.
This is a rare opportunity since these were internal documentation not made available to the public. Generally a computer system came with a complete set of documentation and the manuals stayed with the system till scrapped and the scrap dealer tossed the manuals or sold them for their scrap paper value. The images presented are all of the item for sale. Please click on the thumbnails to enlarge the images.
I was a Senior Systems Engineer for Univac in Philadelphia Pa. for many years beginning in 1968 to the 80's. In 1968 I attended a class in Ilion, New York. There were two of us in the class. We were told that since this was the last class to be taught that we could write in the training materials and keep anything we wanted. I kept this manual and personally marked it up. This manual has survived all these years even through my moves initially because I never knew for sure where my next assignment might take me, and later I recognized it's collectability. But now that I've retired I think it's time to find a good home for it. I only hope that it'll be appreciated.
The Univac 1050 had up to 8 seven bit core memory stacks, each containing 4092 locations which gave the system a maximum of 32k of memory. One unit came standard with the processor purchase and the other 7 were features available for purchase at $10,000 per 4k stack. I sold one of the memory stacks for auction in a previous eBay listing. The computer was released in, I believe, 1965. and the drawings are dated 1962 thru 1965. To the right is an image showing the stack I sold sitting on the engineering drawing, a part of a seperate listing, showing the layout of the 8 memory stacks. This processor used 6 bit octal memory locations which allowed for up to only 64 different characters to be represented. Thus lower case characters didn't exist. The computer used 5 adjacent memory locations to make up a 30 bit instruction word. The computer did arithmetics in decimal or in binary. The Univac 1050 was designed as a satellite to the much larger Univac 3 and many of those that I knew were in IT departments that owned both systems.
I'm displaying some of the pages from the manual. As you can see the pages are somewhat yellowed. Look at the perf holes where you see my white background paper for a comparison. I took the pictures with white balance enabled for my tungsten lights so the background paper correctly renders as white. The pages are otherwise in quite good condition. I don't see any with the punch holes torn out. Not bad for a 40 year old loose leaf training aid. As I said there are neatly written pertinent notes made on the pages. The images presented show parts of the Logic Flow of the add and subtract instructions. Remember this processor was a six bit machine, and even the adder had only 6 bits. Decimal digits were represented by an XS3 representation so that a zero value was a binary 3. In the image below you see a 9 being added to the carry value. The 9 is represent by a 8 and 4 weight bit. A 12 is representing the decimal 9. In this case it's being added to the carry of 1. This machine used a subtractive adder which is the kind of statement that caused the industry to begin using the term ALU! You would see a similar diagram whether your looking at a logic flow for the micro code in today's CPU chip, as you see here. The major difference; this is accomplished purely in hardware
Characteristically the 1050 had a printer, a card reader and a card punch. The card reader ran at 1000 cards per minute and the punch at 300 cpm. The system the memory came out of also had two different tape subsystems. It had VI6c drives which were legacy IBM compatible NRZI capable. The other string had IIIA tape drives which used a phase encoding (PE) recording method which became the industry standard for many years. I was trained on, but never saw again, a Fastrand Drum which this system supported. The two systems at the Philadelphia Navy Yard were the only systems, I ever saw, with a console printer (KSR 28 Teletype). The rest were run from the operators panel, which was a row of switches and lights that the operator controlled by reading the binary (actually octal) value. If you know the IBM 370/148 you're getting close. A system at General Accident had two printers that ran at 600 lines per minute.
I think today's PC's wouldn't handle two printers, printing simultaneously, so I sometimes question whether the PC of today is really more powerful. Faster I agree, this computer ran at 4.5 uSec. That's 222Khz, not 222Mhz not 2.2 Ghz, a measly 222Khz! However, the programs were written in machine language or an assembly language called PAL and were very tightly written. I once wrote a program on this system in machine language that ran both printers simultaneously. I stored the program on a punch card. The entire program was stored on ONE punch card. The card could hold 160 memory locations in two 80 character fields on the card. That was called image mode. The card was booted into memory and executed directly. There was no Windows, not even Dos. The program handled all the resources of the computer, executed it's own I/O, and their interrupts, all in the 160 memory locations. That's tight programming.
It's my opinion that the major chip makers (Intel and or AMD) should invest in this manual. I think that the era of major changes in CPU speed is over. Moore's law is dead. CPU chips today are running at about 3gHz up from 3gHz 8 years ago. The chips are being manufactured with smaller and smaller die sizes to cut down the heat and increase the speed. The speed is not being used to run the instructions that our programmers use to enabled our programs. The speed is used to run "Micro Code" which determines how our programmers instructions get executed. Todays CPU chips really have two CPU's, the second being the micro processor which runs the microcode. The Univac 1050 computer on the other hand ran at the speed of the memory. What determined how the instructions ran were function signals. A 10 instruction might generate function signal 10. The machine cycle was broken into t times (called PC times) which were used to enabled the data to pass from register to register or to memory, in a manner which when the instruction finished had the result the programmer required. Todays computers are really running at 150 Mhz, or so, the speed that the memory, stripped of all the bull (CAS Delays), can really eek out. Were we to go back to using function generation to control the CPU chip we'd have a much cooler stable processor that would run at the same speed we're acustomed to. Meanwhile the Micro Code which uses up a considerable percentage of the chip die could be replaced by more cache memory. Nine pages of the logic manual are dedicated to function generation. A representative page contains 37 transistors. In an era where CPU chips contain 100 million transistors the 333 transistors bear no hindrance to the change. Granted the CPU of today has a larger variety of instructions, but then again we could afford to throw into the mix a couple hundred more transistors. I think this whole idea of microcode started with the IBM 360 which had a bubble card, I never saw one. The IBM 370 and 3030 series machines used an 8 inch floppy, as did a lot of Univac proccessors and Control Units. This is where the microcode came from. If needed the microcode could be updated. Today the microcode is permanently burned into the chip. Were not gaining anything using microcode. But......... Its the way it's done, it's all we know!
This manual is 5 1/2 x 8" and is more than an inch thick. I'd say there are maybe 175 pages printed double sided. It covers the Processor, including multiply and divide which were optional features!, and the Printer Reader and Punch synchronizers that were an integral part of the CPU.
I tried to present pictures capable of presenting the condition of the item so that you can make your own decision as to whether this is suitable for your collection. The memory or the logic manual illustrated is NOT included in this auction. The Logic Manual, is for sale in another eBay listing running currently.
Buy-It-Now only $109.95
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The pictures in this listing and the page design are copyrighted, 2007, 2011, by John Duda. We will bill for any unauthorized use. In addition we will notify appropriate authorities of the fraudulent use of our images to misportray your item for sale on this site.
The following image is for illustrative purposes only and bears no resemblence to the item being auctioned here. The illustration is from a Univac training manual on the Univac 7013 memory, a much larger much faster memory. I'd be willing to sell that manual also. Click to enlarge.